M25PE80-VMN6TP View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M25PE80-VMN6TP
STMicroelectronics
M25PE80-VMN6TP Datasheet PDF : 61 Pages
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DC and AC parameters
M25PE80
Table 21. AC characteristics
Test conditions specified in Table 17 and Table 18
Symbol Alt.
Parameter
Min.
Typ.
Max. Unit
Clock Frequency for the following
fC
fC
instructions: FAST_READ, RDLR, PW,
PP, WRLR, PE, SE, DP, RDP, WREN,
D.C.
WRDI, RDSR
50 MHz
fR
Clock Frequency for READ
instructions
D.C.
tCH(1)
tCLH Clock High Time
9
tCL(1)
tCLL Clock Low Time
9
Clock Slew Rate (2) (peak to peak)
0.1
20 MHz
ns
ns
V/ns
tSLCH
tCSS S Active Setup Time (relative to C)
5
ns
tCHSL
S Not Active Hold Time (relative to C)
5
ns
tDVCH
tDSU Data In Setup Time
2
ns
tCHDX
tDH Data In Hold Time
5
ns
tCHSH
S Active Hold Time (relative to C)
5
ns
tSHCH
S Not Active Setup Time (relative to C) 5
ns
tSHSL
tSHQZ(2)
tCSH
tDIS
S Deselect Time
Output Disable Time
100
ns
8
ns
tCLQV
tV Clock Low to Output Valid
8
ns
tCLQX
tHO Output Hold Time
0
ns
tTHSL
Top Sector Lock Setup Time
50
ns
tSHTL
Top Sector Lock Hold Time
100
tDP(2)
S to Deep Power-down
tRDP(2)
S High to Standby Mode
ns
3
µs
30
µs
tPW(3)
Page Write Cycle Time (256 Bytes)
Page Write Cycle Time (n Bytes)
11
10.1 +
25 ms
n * 0.9/256
tPP(3)
Page Program Cycle Time (256 Bytes)
Page Program Cycle Time (n Bytes)
1.35
0.45 +
5
ms
n * 0.9/256
tPE
Page Erase Cycle Time
10
20 ms
tSE
Sector Erase Cycle Time
1
5
s
tBE
Bulk Erase Cycle Time
10
60
s
1. tCH + tCL must be greater than or equal to 1/ fC
2. Value guaranteed by characterization, not 100% tested in production.
3. When using PP and PW instructions to update consecutive Bytes, optimized timings are obtained with one
sequence including all the Bytes versus several sequences of only a few Bytes (1 ≤n ≤256).
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