M50FLW040A, M50FLW040B
Block
Size
(KByte)
Address
Range
Block
No and
Type
Sector
Size
(KByte)
Sector
No
Register
Address
0F000h-
0FFFFh
4
15
0E000h-
0EFFFh
4
14
0D000h-
0DFFFh
4
13
0C000h-
0CFFFh
4
12
0B000h-
0BFFFh
4
11
0A000h-
0AFFFh
4
10
09000h-
09FFFh
4
9
08000h-
64
08FFFh 0
07000h- (Main)
07FFFh
4
4
8
FB80002
7
06000h-
06FFFh
4
6
05000h-
05FFFh
4
5
04000h-
04FFFh
4
4
03000h-
03FFFh
4
3
02000h-
02FFFh
4
2
01000h-
01FFFh
4
1
00000h-
00FFFh
4
0
Note: In LPC mode, a most significant nibble, F, must be added to
the memory address. For all registers, A22=0, and the re-
maining address bits should be set according to the rules
shown in the ADDR field of Table 6. to Table 9..
Table 35. M50FLW040B Block and Sector
Addresses
Block
Size
(KByte)
Address
Range
Block
No and
Type
Sector
Size
(KByte)
Sector
No
Register
Address
7F000h-
7FFFFh
4
47
7E000h-
7EFFFh
4
46
7D000h-
7DFFFh
4
45
7C000h-
7CFFFh
4
44
7B000h-
7BFFFh
4
43
7A000h-
7AFFFh
4
42
79000h-
79FFFh
4
41
78000h-
64
78FFFh 7
77000h- (Top)
77FFFh
4
4
40
FBF0002
39
76000h-
76FFFh
4
38
75000h-
75FFFh
4
37
74000h-
74FFFh
4
36
73000h-
73FFFh
4
35
72000h-
72FFFh
4
34
71000h-
71FFFh
4
33
70000h-
70FFFh
4
32
64
60000h- 6
6FFFFh (Main)
FBE0002
64
50000h- 5
5FFFFh (Main)
FBD0002
64
40000h- 4
4FFFFh (Main)
FBC0002
64
30000h- 3
3FFFFh (Main)
FBB0002
64
20000h- 2
2FFFFh (Main)
FBA0002
42/52