M50FLW040A, M50FLW040B
Figure 26. Chip Erase Flowchart and Pseudo Code (A/A Mux Interface Only)
Start
Write 80h
Write 10h
Read Status
Register
Chip Erase command:
– write 80h
– write 10h
(memory enters read Status Register after
the Chip Erase command)
do:
– read Status Register
NO
SR7 = 1
YES
NO
SR3 = 0
YES
NO
SR4, SR5 = 0
YES
NO
SR5 = 0
YES
End
VPP Invalid
Error (1)
Command
Sequence Error (1)
Erase Error (1)
while SR7 = 0
If SR3 = 1, VPP invalid error:
– error handler
If SR4, SR5 = 1, Command sequence error:
– error handler
If SR5 = 1, Erase error:
– error handler
AI08428B
Note: 1. If an error is found, the Status Register must be cleared before further Program/Erase Controller operations.
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