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M50FLW040AN5T View Datasheet(PDF) - STMicroelectronics

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Description
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M50FLW040AN5T Datasheet PDF : 52 Pages
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M50FLW040A, M50FLW040B
Figure 24. Quadruple Byte Program Flowchart and Pseudo Code (A/A Mux Interface Only)
Start
Write 30h
Write Address 1
& Data 1 (3)
Write Address 2
& Data 2 (3)
Write Address 3
& Data 3 (3)
Quadruple Byte Program command:
write 30h
write Address 1 & Data 1 (3)
write Address 2 & Data 2 (3)
write Address 3 & Data 3 (3)
write Address 4 & Data 4 (3)
(memory enters read status state after
the Quadruple Byte Program command)
Write Address 4
& Data 4 (3)
Read Status
Register
NO
Suspend
YES
NO
SR7 = 1
YES
Suspend
Loop
NO
SR3 = 0
VPP Invalid
Error (1, 2)
YES
NO
SR4 = 0
Program
Error (1, 2)
YES
End
do:
Read Status Register
If SR7=0 and a Program/Erase Suspend
command has been executed
SR7 is set to 1
Enter suspend program loop
If SR3 = 1, VPP invalid error:
error handler
If SR4 = 1, Program error:
error handler
AI08437B
Note: 1. A Status check of SR3 (VPP invalid) and SR4 (Program Error) can be made after each Program operation by following the correct
command sequence.
2. If an error is found, the Status Register must be cleared before further Program/Erase Controller operations.
3. Address1, Address 2, Address 3 and Address 4 must be consecutive addresses differing only for address bits A0 and A1.
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