M50FLW040AN5T View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M50FLW040AN5T
STMicroelectronics
M50FLW040AN5T Datasheet PDF : 52 Pages
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M50FLW040A, M50FLW040B
Figure 23. Double/Quadruple Byte Program Flowchart and Pseudo code (FWH Mode Only)
Start
Write 40h or 10h
Write Start Address
and 2/4 Data Bytes (3)
Double/Quadruple Byte Program command:
– write 40h or 10h
– write Start Address and 2/4 Data Bytes (3)
(memory enters read status state after
the Double/Quadruple Byte Program command)
Read Status
Register
NO
Suspend
YES
NO
SR7 = 1
YES
Suspend
Loop
NO
SR3 = 0
VPP Invalid
Error (1, 2)
YES
NO
SR4 = 0
Program
Error (1, 2)
YES
NO
SR1 = 0
Program to Protected
Block Error (1, 2)
YES
End
do:
– Read Status Register
– If SR7=0 and a Program/Erase Suspend
command has been executed
– SR7 is set to 1
– Enter suspend program loop
If SR3 = 1, VPP invalid error:
– error handler
If SR4 = 1, Program error:
– error handler
If SR1 = 1,
Program to protected block error:
– error handler
AI08423B
Note: 1. A Status check of SR3 (VPP Invalid) and SR4 (Program Error) can be made after each program operation by following the correct
command sequence.
2. If an error is found, the Status Register must be cleared before further Program/Erase operations.
3. A0 and/or A1 are treated as Don’t Care (A0 for Double Byte Program and A1-A0 for Quadruple Byte Program).
For Double Byte Program: Starting at the Start Address, the first data Byte is programmed at the even address, and the second at
the odd address.
For Quadruple Byte Program: Starting at the Start Address, the first data Byte is programmed at the address that has A1-A0 at 00,
the second at the address that has A1-A0 at 01, the third at the address that has A1-A0 at 10, and the fourth at the address that
has A1-A0 at 11.
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