M50FLW040AN5TP View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M50FLW040AN5TP

4-Mbit (5 × 64 Kbyte blocks + 3 × 16 × 4 Kbyte sectors) 3-V supply Firmware Hub / low-pin count Flash memory

STMicroelectronics 

Firmware hub/low pin count (FWH/LPC) interface Configuration Registers

M50FLW040A,

6.1.3

Lock Down

The Lock Down Bit provides a mechanism for protecting software data from simple hacking

and malicious attack. When the Lock Down Bit is set, ‘1’, further modification to the Write

Lock, Read Lock and Lock Down Bits cannot be performed. A reset, or power-up, is required

before changes to these bits can be made. When the Lock Down Bit is reset, ‘0’, the Write

Lock, Read Lock and Lock Down Bits can be changed.

Table 15. Configuration Register map

Mnemonic

Register Name

Memory

Address

Default

Value

Access

Lock Registers (For details, see Appendix A)

GPI_REG

Firmware Hub/Low Pin Count (FWH/LPC)

General Purpose Input Register

FBC0100h

N/A

R

MANU_REG Manufacturer Code Register

FBC0000h

20h

R

1. In LPC mode, a most significant nibble, F, must be added to the memory address. For all registers, A22=0,

and the remaining address bits should be set according to the rules shown in the ADDR field of Table 6 to

Table 9.

Table 16. Lock Register bit definitions

Bit Bit Name Value

Function(1)

7-3

Reserved

‘1’ Bus Read operations in this Block always return 00h.

2 Read-Lock

‘0’

Bus read operations in this Block return the Memory Array contents.

(Default value).

Changes to the Read-Lock bit and the Write-Lock bit cannot be

‘1’

performed. Once a ‘1’ is written to the Lock-Down bit it cannot be

cleared to ‘0’; the bit is always reset to ‘0’ following a Reset (using RP

1 Lock-Down

or INIT) or after power-up.

‘0’

Read-Lock and Write-Lock can be changed by writing new values to

them. (Default value).

0 Write-Lock

Program and Erase operations in this Block will set an error in the

‘1’ Status Register. The memory contents will not be changed. (Default

value).

‘0’

Program and Erase operations in this Block are executed and will

modify the Block contents.

1. Applies to Top Block Lock Register (T_BLOCK_LK) and Top Block [-1] Lock Register (T_MINUS01_LK) to

Top Block [-7] Lock Register (T_MINUS07_LK).

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