M69KB096AB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M69KB096AB

64 Mbit (4Mb x 16)/ 104MHz Clock Rate 1.8V Supply - Bare Die Burst PSRAM

STMicroelectronics 

M69KB096AB

9 DC and AC parameters

Figure 30. Burst Write Showing End-of-Row Condition AC Waveforms (No Wrap)

tKLKH

K

Addr.

tKHKH

tF

DON'T CARE

L

LB/UB

E

High

G

Note 2

W

WAIT

DQ0-DQ15

tKHTV

tDVKH

VALID

INPUT D[n]

tKHDX

VALID

INPUT D[n+1]

DON'T CARE

tEHTZ

tEHTZ

High-Z

End of Row

(A6-A0 = 7Fh)

ai11575

1. The WAIT signal is active Low (BCR10=0), and is asserted during delay (BCR8=0).

2. The Chip Enable signal, E, must go High before the third Clock cycle after the WAIT signal goes Low. If BCR8 were set to

1, E would have to go Low before the fourth Clock cycle after WAIT signal goes Low.

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