MB90P663APFM View Datasheet(PDF) - Fujitsu

Part Name

Description

Manufacturer

MB90P663APFM

16-bit Proprietary Microcontroller

Fujitsu 

MB90660A Series

10. Low Power Consumption Controller (CPU intermittent operation function, stable oscillation

wait time, and clock multiplier function)

The following operation modes are available: PLL clock mode, PLL sleep mode, clock mode, main clock mode,

main sleep mode and stop mode. Operation modes other than PLL clock mode are classified as low power

consumption modes.

Main clock mode and main sleep mode are modes where the microcontroller operates using the main clock

(OSC oscillation clock) only. In these modes, the main clock divided by two is used as the operation clock and

the PLL clock (VCO oscillation clock) is stopped.

In PLL sleep mode and main sleep mode, only the operation clock of the CPU is stopped, while operations

besides the CPU clock continue.

In clock mode, only the timebase timer is allowed to operate.

In stop mode, oscillation is stopped, allowing data to be held at the lowest power consumption possible.

The CPU intermittent operation function causes the clock provided to the CPU to function intermittently when

accessing registers, internal memory, internal resources and the external bus. This allows processing to be

performed at lower power consumption by reducing the CPU execution speed while continuing to provide a high

speed clock to internal resources.

The PLL clock multiplier can be selected as 1, 2, 3 or 4 using the CS1 and CS0 bits.

The stable oscillation wait time for the main clock when stop mode is cancelled can be set using the WS1 and

WS0 bits.

(1) Register Configuration

Low power consumption mode bit

control register

Address : 0000A0H

Read/Write

Initial value

7

6

5

4

3

2

1

0

STP SLP SPL RST Reserved CG1 CG0 Reserved

(W) (W) (R/W) (W) (–) (R/W) (R/W) (–)

(0) (0) (0) (1) (1) (0) (0) (0)

Clock selection register

Address : 0000A1H

bit 15 14 13 12 11 10 9 8

Reserved MCM WS1 WS0 Reserved MCS CS1 CS0

Read/Write

Initial value

(–) (R) (R/W) (R/W) (–) (R/W) (R/W) (R/W)

(1) (1) (1) (1) (1) (1) (0) (0)

LPMCR

CKSCR

43

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