MT90866 View Datasheet(PDF) - Zarlink Semiconductor Inc

Part Name

Description

Manufacturer

MT90866

Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch

Zarlink Semiconductor Inc 

MT90866

Data Sheet

Backplane Frame Boundary

FRAME_A_io,

FRAME_B_io

(OUTPUT)

tCFPOW

tCFODR

C8_A_io,

C8_B_io

(OUTPUT)

tC8MH

tC8ML

C32/64o

(32.768 MHz)

tC32ML tC32MH

tC32MP

tC64ML

tC64MH

tC64MP

C32/64o

(65.536 MHz)

tFBOS

tCFODF

tC32MOD

tC64MOD

tC8MP

trC8o

trC32o

tfC8o

tfC32o

Figure 23 - Backplane Frame Pulse Output and Clock Output Timing Diagram (in Primary Master

Mode and Secondary Master Mode)

AC Electrical Characteristics† - C20i Master Input Clock Timing

Characteristic

Sym.

Min. Typ.‡ Max.

1 C20i Input Clock Period

2 C20i Input Clock Tolerance

tC20MP

49.995 50 50.005

-100

100

3 C20i Input Clock High Time

tC20MH

20

30

4 C20i Input Clock Low Time

tC20ML

20

30

5 C20i Input Rise/Fall Time

trC20M,

10

tfC20M

† Characteristics are over recommended operating conditions unless otherwise stated.

‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.

Units

ns

ppm

ns

ns

ns

Notes

C20i

tC20ML

tC20MP

tC20MH

trC20M

tfC20M

Figure 24 - Backplane Frame Pulse Input and Clock Input Timing Diagram

70

Zarlink Semiconductor Inc.

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