PCF8578HT View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
PCF8578HT Datasheet PDF : 46 Pages
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NXP Semiconductors
PCF8578
LCD row/column driver for dot matrix graphic displays
11. Dynamic characteristics
Table 18. Dynamic characteristics
All timing values are referenced to VIH and VIL levels with an input voltage swing of VSS to VDD. VDD = 2.5 V to 6 V; VSS = 0 V;
VLCD = VDD − 3.5 V to VDD − 9 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
fclk
clock frequency
at multiplex rate 1:8, 1:16 1.2
2.1
3.3
kHz
and 1:32;
Rext(OSC) = 330 kΩ;
VDD = 6 V
at multiplex rate 1:24;
0.9
1.6
2.5
kHz
Rext(OSC) = 330 kΩ;
VDD = 6 V
tPD(SYNC_N) SYNC propagation delay
-
-
500
ns
tPD(drv)
driver propagation delay
VDD − VLCD = 9 V;
-
-
100
µs
with test load of 45 pF
I2C-bus
fSCL
SCL clock frequency
-
-
100
kHz
tw(spike)
tBUF
spike pulse width
bus free time between a STOP
and START condition
-
-
4.7
-
100
ns
-
µs
tSU;STA
set-up time for a repeated START
condition
4.7
-
-
µs
tHD;STA
hold time (repeated) START
condition
4.0
4.0
-
µs
tLOW
tHIGH
tr
LOW period of the SCL clock
HIGH period of the SCL clock
rise time of both SDA and SCL
signals
4.7
-
4.0
-
-
-
-
µs
-
µs
1
µs
tf
fall time of both SDA and SCL
signals
-
-
0.3
µs
tSU;DAT
tHD;DAT
tSU;STO
data set-up time
data hold time
set-up time for STOP condition
250
-
-
ns
0
-
-
ns
4.0
-
-
µs
PCF8578_6
Product data sheet
Rev. 06 — 5 May 2009
© NXP B.V. 2009. All rights reserved.
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