PIC18LC658-I/CL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LC658-I/CL

High-Performance Microcontrollers with CAN Module

Microchip Technology 

PIC18CXX8

TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable

Devices

Power-on Reset,

Brown-out Reset

MCLR Reset

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

CANCON

658

858

xxxx xxx-

uuuu uuu-

uuuu uuu-

CANSTAT

658

858

xxx- xxx-

uuu- uuu-

uuu- uuu-

RXB0D7

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D6

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D5

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D4

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D3

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D2

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D1

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0D0

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0DLC

658

858

0xxx xxxx

0uuu uuuu

uuuu uuuu

RXB0EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0SIDL

658

858

xxxx x-xx

uuuu u-uu

uuuu u-uu

RXB0SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB0CON

658

858

000- 0000

000- 0000

uuu- uuuu

RXB1D7

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D6

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D5

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D4

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D3

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D2

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D1

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1D0

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1DLC

658

858

0xxx xxxx

0uuu uuuu

uuuu uuuu

RXB1EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1SIDL

658

858

xxxx x0xx

uuuu u0uu

uuuu uuuu

RXB1SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXB1CON

658

858

0000 0000

0000 0000

uuuu uuuu

TXB0D7

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

TXB0D6

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

TXB0D5

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

TXB0D4

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

TXB0D3

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

TXB0D2

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

TXB0D1

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

4: See Table 3-2 for RESET value for specific condition.

5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other

oscillator modes, they are disabled and read ’0’.

6: The long write enable is only reset on a POR or MCLR.

7: Available on PIC18C858 only.

DS30475A-page 38

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 2000 Microchip Technology Inc.

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