PIC18LC658-I/CL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LC658-I/CL

High-Performance Microcontrollers with CAN Module

Microchip Technology 

PIC18CXX8

TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable

Devices

Power-on Reset,

Brown-out Reset

MCLR Reset

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

RXM1SIDL

658

858

xxx- --xx

uuu- --uu

uuu- --uu

RXM1SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXM0EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXM0EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXM0SIDL

658

858

xxx- --xx

uuu- --uu

uuu- --uu

RXM0SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF5EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF5EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF5SIDL

658

858

xxx- x-xx

uuu- u-uu

uuu- u-uu

RXF5SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF4EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF4EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF4SIDL

658

858

xxx- x-xx

uuu- u-uu

uuu- u-uu

RXF4SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF3EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF3EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF3SIDL

658

858

xxx- x-xx

uuu- u-uu

uuu- u-uu

RXF3SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF2EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF2EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF2SIDL

658

858

xxx- x-xx

uuu- u-uu

uuu- u-uu

RXF2SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF1EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF1EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF1SIDL

658

858

xxx- x-xx

uuu- u-uu

uuu- u-uu

RXF1SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF0EIDL

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF0EIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

RXF0SIDL

658

858

xxx- x-xx

uuu- u-uu

uuu- u-uu

RXF0SIDH

658

858

xxxx xxxx

uuuu uuuu

uuuu uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

4: See Table 3-2 for RESET value for specific condition.

5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other

oscillator modes, they are disabled and read ’0’.

6: The long write enable is only reset on a POR or MCLR.

7: Available on PIC18C858 only.

DS30475A-page 40

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 2000 Microchip Technology Inc.

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