PIC18CXX8
REGISTER 4-1:
STKPTR - STACK POINTER REGISTER
R/C-0
R/C-0
U-0
STKFUL STKUNF
—
bit 7
R/W-0
SP4
R/W-0
SP3
R/W-0
SP2
R/W-0
SP1
R/W-0
SP0
bit 0
bit 7 STKFUL: Stack Full Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
bit 6 STKUNF: Stack Underflow Flag bit
1 = Stack underflow occurred
0 = Stack underflow did not occur
bit 5
bit 4-0
Unimplemented: Read as '0'
SP4:SP0: Stack Pointer Location bits
Note: Bit 7 and bit 6 can only be cleared in user software or by a POR.
Legend
R = Readable bit
W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared C = Clearable bit
FIGURE 4-2: RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
TOSU
0x00
TOSH
0x1A
Return Address Stack
TOSL
0x34
11111
11110
11101
STKPTR<4:0>
00010
00011
Top-of-Stack 0x001A34 00010
0x000D58 00001
0x000000 00000(1)
Note 1: No RAM associated with this address; always maintained ‘0’s.
2000 Microchip Technology Inc.
Advanced Information
DS30475A-page 43