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PIC18LF8410-I/PTQTP View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC18LF8410-I/PTQTP
Microchip
Microchip Technology 
PIC18LF8410-I/PTQTP Datasheet PDF : 404 Pages
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PIC18F6310/6410/8310/8410
TABLE 1-2: PIC18F6310/6410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin Buffer
TQFP
Type Type
Description
PORTG is a bidirectional I/O port.
RG0/CCP3
RG0
CCP3
3
I/O
ST
Digital I/O.
I/O
ST
Capture 3 input/Compare 3 output/PWM 3 output.
RG1/TX2/CK2
RG1
TX2
CK2
4
I/O
ST
Digital I/O.
O
AUSART2 asynchronous transmit.
I/O
ST
AUSART2 synchronous clock (see related RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
5
I/O
ST
Digital I/O.
I
ST
AUSART2 asynchronous receive.
I/O
ST
AUSART2 synchronous data (see related TX2/CK2).
RG3
6
I/O
ST
Digital I/O.
RG4
8
I/O
ST
Digital I/O.
RG5
See RG5/MCLR/VPP pin.
VSS
9, 25, 41, 56 P
— Ground reference for logic and I/O pins.
VDD
10, 26, 38, 57 P
— Positive supply for logic and I/O pins.
AVSS
20
P
— Ground reference for analog modules.
AVDD
19
P
— Positive supply for analog modules.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1: Default assignment for CCP2 when configuration bit CCP2MX is set.
2: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared.
2004 Microchip Technology Inc.
Preliminary
DS39635A-page 19

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