PIC18LF8410-I/PTQTP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF8410-I/PTQTP

64/80-Pin Flash Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC18F6310/6410/8310/8410

TABLE 1-3: PIC18F8310/8410 PINOUT I/O DESCRIPTIONS

Pin Name

Pin Number Pin Buffer

TQFP

Type Type

Description

RG5/MCLR/VPP

RG5

MCLR

VPP

9

Master Clear (input) or programming voltage (input).

I

ST

Digital input.

I

ST

Master Clear (Reset) input. This pin is an active-low

Reset to the device.

P

Programming voltage input.

OSC1/CLKI/RA7

OSC1

CLKI

RA7

49

Oscillator crystal or external clock input.

I

ST

Oscillator crystal input or external clock source input.

ST buffer when configured in RC mode, CMOS

otherwise.

I CMOS External clock source input. Always associated with

pin function OSC1. (See related OSC1/CLKI,

OSC2/CLKO pins.)

I/O TTL

General purpose I/O pin.

OSC2/CLKO/RA6

OSC2

CLKO

RA6

50

Oscillator crystal or clock output.

O

—

Oscillator crystal output. Connects to crystal or

resonator in Crystal Oscillator mode.

O

—

In RC mode, OSC2 pin outputs CLKO, which has

1/4 the frequency of OSC1 and denotes the

instruction cycle rate.

I/O TTL

General purpose I/O pin.

Legend:

TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

I = Input

P = Power

CMOS

Analog

O

OD

= CMOS compatible input or output

= Analog input

= Output

= Open-Drain (no P diode to VDD)

Note 1: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared (all operating modes except

Microcontroller mode).

2: Default assignment for CCP2 in all operating modes (CCP2MX is set).

3: Alternate assignment for CCP2 when CCP2MX is cleared (Microcontroller mode only).

DS39635A-page 20

Preliminary

 2004 Microchip Technology Inc.

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