PSD501B1-C-90UI View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD501B1-C-90UI Datasheet PDF : 153 Pages
| |||
Counter/Timer
Operation
(Cont.)
PSD5XX Family
Counter/Timer Clock Input (Cont.)
Table 22. DLCY, Scale Bit and DIV to Generate Different Clock Divisions
DLCY Scale Bit DIV
DLCY Scale Bit
DIV
0
0
4
1
0
5
2
0
6
3
0
7
4
0
8
5
0
9
6
0
10
7
0
11
8
0
12
9
0
13
10
0
14
11
0
15
12
0
16
13
0
17
14
0
18
15
0
19
16
0
20
17
0
21
18
0
22
19
0
23
20
0
24
21
0
25
22
0
26
23
0
27
24
0
28
25
0
29
26
0
30
27
0
31
28
0
32
29
0
33
30
0
34
31
0
35
1
1
40
2
1
48
3
1
56
4
1
64
5
1
72
6
1
80
7
1
88
8
1
96
9
1
104
10
1
112
11
1
120
12
1
128
13
1
136
14
1
144
15
1
152
16
1
160
17
1
168
18
1
176
19
1
184
20
1
192
21
1
200
22
1
208
23
1
216
24
1
224
25
1
232
26
1
240
27
1
248
28
1
256
29
1
264
30
1
272
31
1
280
Sample Calculation of Timer Input Clock
External input clock to the PSD5XX is 8 MHz.
If required Counter/Timers 0 – 3 count frequency is 1 MHz then
The Counter/Timer CLOCK Input
(External Clock input)
=
(DIV)
1 MHz = 8 MHz =>
(DIV)
(DIV) = 8
Therefore from Table 22 when (DIV) = 8, the Scale-Bit in the “Global Command Register” is
set to a 0 and the DLCY register to a value of 4.
79
Share Link: 