PSD834F2V
AC/DC PARAMETERS
These tables describe the AD and DC parameters
of the PSD:
t DC Electrical Specification
t AC Timing Specification
s PLD Timing
– Combinatorial Timing
– Synchronous Clock Mode
– Asynchronous Clock Mode
– Input Macrocell Timing
s MCU Timing
– Read Timing
– Write Timing
– Peripheral Mode Timing
– Power-down and Reset Timing
The following are issues concerning the parame-
ters presented:
s In the DC specification the supply current is
given for different modes of operation. Before
calculating the total power consumption,
determine the percentage of time that the PSD
is in each mode. Also, the supply power is
considerably different if the Turbo bit is 0.
s The AC power component gives the PLD, Flash
memory, and SRAM mA/MHz specification.
Figure 32 shows the PLD mA/MHz as a function
of the number of Product Terms (PT) used.
s In the PLD timing parameters, add the required
delay when Turbo bit is 0.
Figure 32. PLD ICC /Frequency Consumption
60
VCC = 3V
50
TURBO ON (100%)
40
30
20
TURBO ON (25%)
PT 100%
10
TURBO OFF
PT 25%
0
0
5
10
15
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
AI03100
63/89