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SI3232-X-FQR View Datasheet(PDF) - Silicon Laboratories

Part Name
Description
Manufacturer
SI3232-X-FQR
Silabs
Silicon Laboratories 
SI3232-X-FQR Datasheet PDF : 128 Pages
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Si3232
Table 4. AC Characteristics
(VDD, VDD1–VDD4 = 3.13 to 3.47 V, TA = 0 to 70 °C for K-Grade, –40 to 85 °C for B-Grade)
Parameter
Test Condition
Min
Typ
Max Unit
TX/RX Performance
TX Full Scale Output
RX Full Scale Input
Analog Input/Output Common
Mode Voltage
VTXP–XTXN
VRXP–VRXN, ARX = 0 dB
ARX = –3.52 dB
ARX = –6.02 dB
CMTXSEL = 1
CMTXSEL = 0
0.1
0.25
0
0
0.6
VDD–0.1 V
— VDD–0.25 V
VDD
V
VDD
V
1.5
V
1.5
V
Overload Level
ATX stage = 0 dB, THD = 1.5%
2.5
Overload Compression
Figure 4
Single Frequency Distortion1 2-wire to 4-wire or 4-wire to 2-wire:
–74
200 Hz–3.4 kHz
VPK
–68
dB
2-wire to 4-wire to 2-wire:
200 Hz–3.4 kHz
–74
–65
dB
Signal-to-(Noise + Distortion)
200 Hz–3.4 kHz
–74
–68
Ratio2
Active off-hook, and OHT, any ZT
Intermodulation Distortion
–41
dB
Gain Accuracy2
2-Wire to 4-Wire or 4-Wire to 2-Wire,
1014 Hz, Any gain setting
–0.25
+0.25 dB
Gain Distortion vs. Frequency
–3 dB corners
0.01
10
kHz
Gain Tracking
1014 Hz sine wave,
reference level –10 dBm
signal level:
3 dB to –37 dB
–37 dB to –50 dB
–50 dB to –60 dB
±0.25 dB
±0.5
dB
±1.0
dB
Crosstalk between channels
TX or RX to TX
TX to RX to RX
2-Wire Return Loss3
0 dBm0,
300 Hz to 3.4 kHz
300 Hz to 3.4 kHz
200 Hz to 3.4 kHz
–75
dB
–75
dB
26
30
dB
Notes:
1. The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should
be –10 dBm0. The output signal magnitude at any other frequency will be smaller than the maximum value
specified.
2. Analog signal measured as VTIP – VRING. Assumes ideal line impedance matching.
3. VDD = 3.3 V, VBAT = –52 V, no fuse resistors, RL = 600 , ZS = 600 synthesized using RS register coefficients.
4. The level of any unwanted tones within the bandwidth of 0 to 4 kHz will not exceed –55 dBm.
5. The OBIAS and ABIAS registers program the dc bias current through the SLIC in the on-hook transmission and off-
hook active conditions, respectively. This per-pin total current setting should be selected such that it can
accommodate the sum of the metallic and longitudinal currents through each of the TIP and RING leads for a given
application.
8
Preliminary Rev. 0.96

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