SI3201-X-FS View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

SI3201-X-FS

PROSLIC® PROGRAMMABLE CMOS SLIC WITH RINGING/BATTERY VOLTAGE GENERATION

Silicon Laboratories 

Si3233

4.3. SLIC Control

See descriptions of linefeed interface and power monitoring for guidelines on computing register values. All values

are represented in twos-complement format.

Note: The values of all indirect registers are undefined following the reset state. Shaded areas denote bits that can be read

and written but should be written to zeroes.

Table 35. SLIC Control Indirect Registers Summary

Addr D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

15

LCRT[5:0]

16

RPTP[5:0]

17

CML[5:0]

18

CMH[5:0]

19

PPT12[7:0]

20

PPT34[7:0]

21

PPT56[7:0]

22

NCLR[12:0]

23

NRTP[12:0]

24

NQ12[12:0]

25

NQ34[12:0]

26

NQ56[12:0]

27

VCMR[3:0]

64

VMIND[3:0]

66

LCRTL[5:0]

Addr

15

16

17

18

19

Table 36. SLIC Control Indirect Registers Description

Description

Loop Closure Threshold.

Loop closure detection threshold. This register defines the upper bounds threshold if hysteresis is

enabled (direct Register 108, bit 0). The range is 0–80 mA in 1.27 mA steps. See "2.2.6. Loop Clo-

sure Detection" on page 22.

Ring Trip Threshold.

Ring trip detection threshold during ringing. See "2.5.6. Ring Trip Detection" on page 31.

Common Mode Minimum Threshold for Speed-Up.

This register defines the negative common mode voltage threshold. Exceeding this threshold

enables a wider bandwidth of dc linefeed control for faster settling times. The range is 0–23.625 V in

0.375 V steps.

Common Mode Maximum Threshold for Speed-Up.

This register defines the positive common mode voltage threshold. Exceeding this threshold enables

a wider bandwidth of dc linefeed control for faster settling times. The range is 0–23.625 V in 0.375 V

steps.

Power Alarm Threshold for Transistors Q1 and Q2.

88

Preliminary Rev. 0.5

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