ST10F280
XPERCON (F024h / 12h)
ESFR
Reset Value: - - 05h
15 14 13 12 11 10 9 8 7 6 5
4
3
2
1
0
- - - - - - - - - - - XPWMEN XPERCONEN3 XRAMEN CAN2EN CAN1EN
RW
RW
RW
RW
RW
Bit
Function
CAN1EN
CAN1 Enable Bit
0 Accesses to the on-chip CAN1 XPeripheral and its functions are disabled. P4.5 and P4.6 pins
can be used as general purpose I/Os. Address range 00’EF00h-00’EFFFh is only directed to
external memory if CAN2EN and XPWM bits are cleared also.
1 The on-chip CAN1 XPeripheral is enabled and can be accessed.
CAN2EN
CAN2 Enable Bit
0 Accesses to the on-chip CAN2 XPeripheral and its functions are disabled. P4.4 and P4.7 pins
can be used as general purpose I/Os. Address range 00’EE00h-00’EEFFh is only directed to
external memory if CAN1EN and XPWM bits are cleared also.
1 The on-chip CAN2 XPeripheral is enabled and can be accessed.
XRAMEN
XRAM Enable Bit
0 Accesses to the on-chip 16K Byte XRAM are disabled, external access performed.
1 The on-chip 16K Byte XRAM is enabled and can be accessed.
XPERCONEN3
XPORT9, XTIMER, XPORT10, XADCMUX Enable Bit
0 Accesses to the XPORT9, XTIMER, XPORT10, XADCMUX peripherals are disabled, external
access performed.
1 The on-chip XPORT9, XTIMER, XPORT10, XADCMUX peripherals are enabled and can be
accessed.
XPWMEN
XPWM Enable Bit
0 Accesses to the on-chip XPWM are disabled, external access performed. Address range
00’EC00h-00’ECFFh is only directed to external memory if CAN1EN and CAN2EN are ‘0’ also
1 The on-chip XPWM is enabled and can be accessed.
Note: - When both CAN and XPWM are disabled via XPERCON setting, then any access in the address
range 00’EC00h 00’EFFFh will be directed to external memory interface, using the BUSCONx
register corresponding to address matching ADDRSELx register. P4.4 and P4.7 can be used as
General Purpose I/O when CAN2 is not enabled, and P4.5 and P4.6 can be used as General
Purpose I/O when CAN1 is not enabled.
- The default XPER selection after Reset is : XCAN1 is enabled, XCAN2 is disabled, XRAM is
enabled, XPORT9, XTIMER, XPORT10, XPWM, XADCMUX are disabled.
- Register XPERCON cannot be changed after the global enabling of XPeripherals, i.e. after
setting of bit XPEN in SYSCON register.
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