STA320 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STA320 Datasheet PDF : 37 Pages
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STA320
5.1.4 Thermal Warning Adjustable Bypass
BIT
R/W
RST
NAME
DESCRIPTION
6
R/W
1
TWAB
Thermal-Warning Recovery Bypass:
0 - Thermal warning Recovery enabled
1 - Thermal warning Recovery disabled
The on-chip STA320 Power Output block provides feedback to the digital controller using inputs to the
Power Control block. The TWARN input is used to indicate a thermal warning condition.
When TWARN is asserted (set to 0) for a period of time greater than 400ms, the power control block will
force a -3dB adjustment to the modulation limit in an attempt to eliminate the thermal warning condition.
Once the thermal warning volume adjustment is applied, it remains in this state until reset.
5.1.5 hermal Warning Adjustable Bypass
BIT
R/W
RST
NAME
DESCRIPTION
7
R/W
0
FDRB
Fault -Detector Recovery Bypass:
0 - Fault Detector Recovery enabled
1 - Fault Detector Recovery disabled
The on-chip STA320 Power Output block provides feedback to the digital controller using inputs to the
Power Control block. The FAULT input is used to indicate a fault condition (either over-current or thermal).
When FAULT is asserted (set to 0), the power control block will attempt a recovery from the fault by as-
serting the tri-state output (setting it to 0 which directs the power output block to begin recovery), hold it at
0 for period of time in the range of .1ms to 1 second as defined by the Fault-Detect Recovery Constant
register (FDRC registers 29-2Ah), then toggle it back to 1. This sequence is repeated as log as the fault
indication exists. This feature is enabled by default but can be bypassed by setting the FDRB control bit
to 1.
5.2 Configuration Register B(Address 01h)
D7
D6
D5
D4
C2IM
C1IM
DSCKE
SAIFB
1
0
0
0
D3
SAI3
0
D2
SAI2
0
D1
SAI1
0
D0
SAI0
0
5.2.1 Serial Data Interface Format
BIT
R/W
RST
NAME
0
R/W
0
SAI0
1
R/W
0
SAI1
2
R/W
0
SAI2
3
R/W
0
SAI3
DESCRIPTION
Serial Audio Input Interface Format: Determines the interface
format of the input serial digital audio interface.
5.2.2 Serial Data Interface
The STA320 audio serial input was designed to interface with standard digital audio components and to
accept a number of serial data formats. STA320 always acts a slave when receiving audio input from stan-
dard digital audio components. Serial data for two channels is provided using 3 inputs: left/right clock LRC-
KI, serial clock BICKI, and serial data 1 & 2 SDI12.
The SAI register (Configuration Register B - 01h, Bits D3-D0) and the SAIFB register (Configuration Reg-
ister B - 01h, Bit D4) are used to specify the serial data format. The default serial data format is I2S, MSB-
First. Available formats are shown in the tables and figure that follow.
Table 11. Serial Data First Bit
SAIFB
0
1
Format
MSB-First
LSB-First
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