STA32813TR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STA32813TR Datasheet PDF : 57 Pages
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Register description
STA328
6.3
Configuration register C (addr 0x02)
6.3.1
6.3.2
D7
Reserved
0
D6
CSZ4
1
D5
CSZ3
0
D4
CSZ2
0
D3
CSZ1
0
D2
CSZ0
0
D1
OM1
1
D0
OM0
0
DDX® power output mode
Table 22. DDX® power output mode
Bit R/W RST
Name
Description
1:0 RW 10 OM[1:0]
DDX® power output mode:
Selects configuration of DDX® output.
The DDX® power output mode selects how the DDX® output timing is configured. Different
power devices can use different output modes. The recommended use is OM = 10. When
OM = 11 the CSZ bits determine the size of the DDX® compensating pulse.
Table 23.
00
01
10
11
DDX® output modes
OM[1,0]
Output stage - mode
Not used
Not used
Recommended
Variable compensation
DDX® variable compensating pulse size
The DDX® variable compensating pulse size is intended to adapt to different power stage
ICs. Contact Apogee applications for support when deciding this function.
Table 24.
00000
00001
…
10000
…
11111
DDX® compensating pulse
CSZ[4:0]
Compensating pulse size
0 clock period compensating pulse size
1 clock period compensating pulse size
…
16 clock period compensating pulse size
…
31 clock period compensating pulse size
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