AT/TSC8x251G2D
Table 19. Notation for Register Operands
Register Description
C251 C51
at Ri
A memory location (00h-FFh) addressed indirectly via byte registers
R0 or R1
–
3
Rn
Byte register R0-R7 of the currently selected register bank
n
Byte register index: n = 0-7
–
3
Rm
Rmd
Rms
m, md, ms
Byte register R0-R15 of the currently selected register file
Destination register
Source register
Byte register index: m, md, ms = 0-15
–
3
Word register WR0, WR2, ..., WR30 of the currently selected register
WRj
file
WRjd
Destination register
WRjs
Source register
at WRj
A memory location (00:0000h-00:FFFFh) addressed indirectly
through word register WR0-WR30, is the target address for jump
–
instructions.
at WRj +dis16 A memory location (00:0000h-00:FFFFh) addressed indirectly
3
j, jd, js
through word register (WR0-WR30) + 16-bit signed (two’s
complement) displacement value
Word register index: j, jd, js = 0-30
Dword register DR0, DR4, ..., DR28, DR56, DR60 of the currently
DRk
selected register file
DRkd
Destination register
DRks
Source register
at DRk
A memory location (00:0000h-FF:FFFFh) addressed indirectly
through dword register DR0-DR28, DR56 and DR60, is the target
–
address for jump instruction
at DRk +dis16 A memory location (00:0000h-FF:FFFFh) addressed indirectly
3
k, kd, ks
through dword register (DR0-DR28, DR56, DR60) + 16-bit (two’s
complement) signed displacement value
Dword register index: k, kd, ks = 0, 4, 8..., 28, 56, 60
23
4135F–8051–11/06