TS68230 View Datasheet(PDF) - STMicroelectronics
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TS68230 Datasheet PDF : 61 Pages
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TS68230
6.6. AC ELECTRICAL SPECIFICATIONS
(VCC = 5.0Vdc ± 5%, VS S = 0Vdc, TA = TL to TH unless otherwise noted)
Iack Timings (figure 6.6)
Number
Parameter
8MHz
10MHz
Min. Max. Min. Max.
8
CS or PIACK or TIACK High to Data Out Invalid (hold time)
0
0
9
CS or PIACK or TIACK High to D0-D7 High Impedance
50
45
10 CS or PIACK or TIACK High to DTACK High
50
45
11 CS or PIACK or TIACK High to DTACK High Impedance
100
55
29 CLK Low to Data Output Valid, Interrupt Acknowledge Cycle
120
100
31 PIACK or TIACK Low to CLK Low (setup time)
50
40
34 CLK Low to DTACK Low Interrupt Acknowledge Cycle (delay time)
100
100
Unit
ns
ns
ns
ns
ns
ns
ns
Figure 6.6 : IACK Timing Diagram.
Notes : 1. This specification assures recognition of the asserted edge of H1(H3).
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