DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

JS28F128P30BF65 View Datasheet(PDF) - Numonyx -> Micron

Part Name
Description
Manufacturer
JS28F128P30BF65 Datasheet PDF : 90 Pages
First Prev 51 52 53 54 55 56 57 58 59 60 Next Last
P30-65nm SBC
Table 26: AC Write Specifications (Sheet 2 of 2)
Num Symbol
Parameter
Min
Max
Unit
Notes
Write to Synchronous Read Specifications
W19
tWHCH/L
WE# high to Clock valid
W20
tWHVH
WE# high to ADV# high
Write Specifications with Clock Active
19
-
ns
1,2,3,6,10
19
-
ns
W21
W22
tVHWL
tCHWL
ADV# high to WE# low
Clock high to WE# low
-
27
ns
1,2,3,11
-
27
ns
Notes:
1.
Write timing characteristics during erase suspend are the same as write-only operations.
2.
A write operation can be terminated with either CE# or WE#.
3.
Sampled, not 100% tested.
4.
Write pulse width low (tWLWH or tELEH) is defined from CE# or WE# low (whichever occurs last) to CE# or WE# high
(whichever occurs first). Hence, tWLWH = tELEH = tWLEH = tELWH.
5.
Write pulse width high (tWHWL or tEHEL) is defined from CE# or WE# high (whichever occurs first) to CE# or WE# low
(whichever occurs last). Hence, tWHWL = tEHEL = tWHEL = tEHWL).
6.
tWHVH or tWHCH/L must be met when transiting from a write cycle to a synchronous burst read.
7.
VPP and WP# should be at a valid level until erase or program success is determined.
8.
This specification is only applicable when transiting from a write cycle to an asynchronous read. See spec W19 and W20
for synchronous read.
9.
When doing a Read Status operation following any command that alters the Status Register, W14 is 20ns.
10.
Add 10ns if the write operations results in a RCR or block lock status change, for the subsequent read operation to
reflect this change.
11.
These specs are required only when the device is in a synchronous mode and clock is active during address setup phase.
12.
This specification must be complied with by customer’s writing timing. The result would be unpredictable if any violation
to this timing specification.
Figure 25: Write-to-Write Timing
Address [A]
CE# [E]
WE# [W]
OE# [G]
Data [D/Q]
RST# [P]
W2
W1
W5
W3
W8
W6
W2
W9
W5
W3
W8
W6
W4
W7
W4
W7
Datasheet
55
Apr 2010
Order Number:208033-02

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]