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AT91SAM9G46B-CU View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
AT91SAM9G46B-CU
Atmel
Atmel Corporation 
AT91SAM9G46B-CU Datasheet PDF : 1277 Pages
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11.4.4.2 Wake-up Reset
The Wake-up Reset occurs when the Main Supply is down. When the Main Supply POR output is active, all the
reset signals are asserted except backup_nreset. When the Main Supply powers up, the POR output is
resynchronized on Slow Clock. The processor clock is then re-enabled during three Slow Clock cycles, depending
on the requirements of the ARM processor.
At the end of this delay, the processor and other reset signals rise. The field RSTTYP in RSTC_SR is updated to
report a Wake-up Reset.
The “nrst_out” remains asserted for EXTERNAL_RESET_LENGTH cycles. As RSTC_MR is backed up, the
programmed number of cycles is applicable.
When the Main Supply is detected falling, the reset signals are immediately asserted. This transition is
synchronous with the output of the Main Supply POR.
Figure 11-5. Wake-up State
SLCK
MCK
Any
Freq.
Main Supply
POR output
backup_nreset
proc_nreset
RSTTYP
periph_nreset
Resynch.
2 cycles
Processor Startup
= 3 cycles
XXX
0x1 = WakeUp Reset
XXX
NRST
(nrst_out)
EXTERNAL RESET LENGTH
= 4 cycles (ERSTL = 1)
SAM9G46 Series [DATASHEET]
77
Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15

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