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STM8S007C8T6TR(2015) View Datasheet(PDF) - STMicroelectronics

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STM8S007C8T6TR Datasheet PDF : 92 Pages
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Electrical characteristics
STM8S007C8
Total current consumption and timing in forced reset state
Symbol
Table 27. Total current consumption and timing in forced reset state
Parameter
Conditions
Typ Max(1) Unit
IDD(R)
Supply current in reset state
tRESETBL
Reset release to bootloader vector
fetch
VDD = 5 V
VDD = 3.3 V
-
1.6
-
mA
0.8
-
-
150
µs
1. Data guaranteed by design, not tested in production.
Current consumption of on-chip peripherals
Subject to general operating conditions for VDD and TA.
HSI internal RC/fCPU = fMASTER = 16 MHz.
Table 28. Peripheral current consumption
Symbol
Parameter
Typ.
Unit
IDD(TIM1)
IDD(TIM2)
IDD(TIM3)
IDD(TIM4)
IDD(UART1)
IDD(UART3)
IDD(SPI)
IDD(I2C)
IDD(ADC2)
TIM1 supply current (1)
TIM2 supply current (1)
TIM3 timer supply current (1)
TIM4 timer supply current (1)
UART1 supply current (2)
UART3 supply current (2)
SPI supply current (2)
I2C supply current (2)
ADC2 supply current when converting (3)
220
120
100
25
90
µA
110
40
50
1000
1. Data based on a differential IDD measurement between reset configuration and timer counter running at 
16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.
2. Data based on a differential IDD measurement between the on-chip peripheral when kept under reset and
not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not
tested in production.
3. Data based on a differential IDD measurement between reset configuration and continuous A/D
conversions. Not tested in production.
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DocID022171 Rev 5

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