PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 20-3: PMADDR: PARALLEL PORT ADDRESS REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2
31:24
23:16
15:8
7:0
U-0
—
U-0
—
R/W-0
CS2(1)
ADDR15(2)
R/W-0
U-0
—
U-0
—
R/W-0
CS1(3)
ADDR14(4)
R/W-0
U-0
—
U-0
—
R/W-0
R/W-0
U-0
—
U-0
—
R/W-0
U-0
—
U-0
—
R/W-0
U-0
—
U-0
—
R/W-0
ADDR<13:8>
R/W-0
R/W-0
ADDR<7:0>
R/W-0
Bit
25/17/9/1
U-0
—
U-0
—
R/W-0
R/W-0
Bit
24/16/8/0
U-0
—
U-0
—
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-16 Unimplemented: Read as ‘0’
bit 15 CS2: Chip Select 2 bit(1)
1 = Chip Select 2 is active
0 = Chip Select 2 is inactive
bit 15 ADDR<15>: Target Address bit 15(2)
bit 14 CS1: Chip Select 1 bit(3)
1 = Chip Select 1 is active
0 = Chip Select 1 is inactive
bit 14 ADDR<14>: Target Address bit 14(4)
bit 13-0 ADDR<13:0>: Address bits
Note 1:
2:
3:
4:
When the CSF<1:0> bits (PMCON<7:6>) = 10 or 01.
When the CSF<1:0> bits (PMCON<7:6>) = 00.
When the CSF<1:0> bits (PMCON<7:6>) = 10.
When the CSF<1:0> bits (PMCON<7:6>) = 00 or 01.
Note:
If the DUALBUF bit (PMCON<17>) = 0, the bits in this register control both read and write target
addressing. If the DUALBUF bit = 1, the bits in this register are not used. In this instance, use the
PMRADDR register for Read operations and the PMWADDR register for Write operations.
2014-2017 Microchip Technology Inc.
DS60001290E-page 213