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PIC32MX230F128L-I/PF View Datasheet(PDF) - Microchip Technology

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Description
Manufacturer
PIC32MX230F128L-I/PF Datasheet PDF : 382 Pages
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PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 20-6: PMAEN: PARALLEL PORT PIN ENABLE REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2
31:24
U-0
U-0
U-0
U-0
U-0
U-0
23:16
U-0
U-0
U-0
U-0
U-0
U-0
15:8
R/W-0
R/W-0
PTEN<15:14>(1)
R/W-0
R/W-0
R/W-0
R/W-0
PTEN<13:8>
7:0
R/W-0
R/W-0
R/W-0
R/W-0
PTEN<7:2>
R/W-0
R/W-0
Bit
25/17/9/1
U-0
U-0
R/W-0
Bit
24/16/8/0
U-0
U-0
R/W-0
R/W-0
R/W-0
PTEN<1:0>(2)
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-16 Unimplemented: Write ‘0’; ignore read
bit 15-14 PTEN<15:14>: PMCSx Address Port Enable bits
1 = PMA15 and PMA14 function as either PMA<15:14> or PMCS2 and PMCS1(1)
0 = PMA15 and PMA14 function as port I/O
bit 13-2 PTEN<13:2>: PMP Address Port Enable bits
1 = PMA<13:2> function as PMP address lines
0 = PMA<13:2> function as port I/O
bit 1-0
PTEN<1:0>: PMALH/PMALL Address Port Enable bits
1 = PMA1 and PMA0 function as either PMA<1:0> or PMALH and PMALL(2)
0 = PMA1 and PMA0 pads function as port I/O
Note 1: The use of these pins as PMA15/PMA14 or CS2/CS1 is selected by the CSF<1:0> bits (PMCON<7:6>).
2: The use of these pins as PMA1/PMA0 or PMALH/PMALL depends on the Address/Data Multiplex mode
selected by the ADRMUX<1:0> bits in the PMCON register.
2014-2017 Microchip Technology Inc.
DS60001290E-page 215

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