PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 5-6: IPCx: INTERRUPT PRIORITY CONTROL REGISTER
Bit
Range
31:24
23:16
15:8
7:0
Bit
31/23/15/7
U-0
—
U-0
—
U-0
—
U-0
—
Bit
30/22/14/6
U-0
—
U-0
—
U-0
—
U-0
—
Bit
29/21/13/5
U-0
—
U-0
—
U-0
—
U-0
—
Bit
Bit
28/20/12/4 27/19/11/3
R/W-0
R/W-0
IP3<2:0>
R/W-0
R/W-0
IP2<2:0>
R/W-0
R/W-0
IP1<2:0>
R/W-0
R/W-0
IP0<2:0>
Bit
26/18/10/2
R/W-0
R/W-0
R/W-0
R/W-0
Bit
Bit
25/17/9/1 24/16/8/0
R/W-0
R/W-0
IS3<1:0>
R/W-0
R/W-0
IS2<1:0>
R/W-0
R/W-0
IS1<1:0>
R/W-0
R/W-0
IS0<1:0>
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-29 Unimplemented: Read as ‘0’
bit 28-26 IP3<2:0>: Interrupt Priority bits
111 = Interrupt priority is 7
•
•
•
010 = Interrupt priority is 2
001 = Interrupt priority is 1
000 = Interrupt is disabled
bit 25-24 IS3<1:0>: Interrupt Subpriority bits
11 = Interrupt subpriority is 3
10 = Interrupt subpriority is 2
01 = Interrupt subpriority is 1
00 = Interrupt subpriority is 0
bit 23-21 Unimplemented: Read as ‘0’
bit 20-18 IP2<2:0>: Interrupt Priority bits
111 = Interrupt priority is 7
•
•
•
010 = Interrupt priority is 2
001 = Interrupt priority is 1
000 = Interrupt is disabled
bit 17-16 IS2<1:0>: Interrupt Subpriority bits
11 = Interrupt subpriority is 3
10 = Interrupt subpriority is 2
01 = Interrupt subpriority is 1
00 = Interrupt subpriority is 0
bit 15-13 Unimplemented: Read as ‘0’
bit 12-10 IP1<2:0>: Interrupt Priority bits
111 = Interrupt priority is 7
•
•
•
010 = Interrupt priority is 2
001 = Interrupt priority is 1
000 = Interrupt is disabled
Note: This register represents a generic definition of the IPCx register. Refer to Table 5-1 for the exact bit
definitions.
2014-2017 Microchip Technology Inc.
DS60001290E-page 61