STLC5460 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STLC5460 Datasheet PDF : 54 Pages
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STLC5460
TS and PCMn
at 4 Mb/s
with n = 0 or 2
TSNB = 1
TS at
2Mb/s
PCM at
2Mb/s
TSNB = 0
TS at
2Mb/s
PCM at
2Mb/s
TS0
TS1
TS2
TS3
TS30 TS31 TS32 TS62 TS63
TS0
TS0
TS1
TS1
TS15 TS15 TS16 TS31 TS31
PCMn PCMn+1 PCMn PCMn+1 PCMn PCMn+1 PCMn PCMn PCMn+1
TS0
TS1
TS2
TS3
TS30 TS31
TS0
TS30 TS31
PCMn
PCMn+1
TS and PCM0
at 8 Mb/s
TSNB = 1
TS at
2Mb/s
PCM at
2Mb/s
TS and PCM
at 8Mb/s
TSNB = 0
TS at
2Mb/s
PCM at
2Mb/s
TS0
TS1
TS2
TS0
TS0
TS0
PCM0 PCM1 PCM2
TS0 to TS31
TS0 to TS31
PCM0
TS3
TS4
TS0
TS1
PCM3 PCM0
TS32 to TS63
TS0 to TS31
PCM1
TS124
TS31
TS32
TS31
PCM0 PCM1
TS64 to TS95
TS0 to TS31
PCM2
TS62
TS31
TS63
TS31
PCM2 PCM3
TS96 to TS127
TS0 to TS31
PCM3
COMPLEMENTARY PCM OFFSET REGISTER (CPOF)
7
PMD1
PMD0
PMD1/0 PCM Mode
TIM1
TIM0
OOF1
After Reset 00 (H)
IOF 0
IOF1
PMD1
0
0
1
1
PMD0
0
1
0
1
The PCM are at
2048 kbit/s
4096 kbit/s
8192 kbit/s
Not used.
0
IOF 0
TIM 1/0 these bits are taken into account only if bit TIM of COMP register is at 1; in this case an inter-
rupt is generated periodically and TIM 1/0 defines the period
OOF1/0
IOF1/0
TIM1
0
0
1
1
TIM0
0
1
0
1
Period
1ms
8ms
64ms
250ms
Output Offset 1/0.
These two bits are associated with OOF2/9 ofOPOF Register.
Input Offset 1/0.
These two bits are associated with IOF2/9 of IPOF Register.
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