STLC5460 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STLC5460 Datasheet PDF : 54 Pages
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IM0
Incoming Multiplex 0 Assignment.
IM0
Incoming Multiplex 0 receives data from
0
Pin DIN 0 (Default Value)
1
Pin DIN 1
OUTPUT MULTIPLEX ASSIGNMENT REGISTER (OMASS)
7
-
-
-
-
0
DO1
0
After Reset 04 (H)
DO1
Output 1 Pin Assignment.
DO1
DOUT 1 pin receives data from
0
Outgoing Multiplex 0
1
Outgoing Multiplex 1 (Default value)
DO0
Output 0 Pin Assignment.
DO1
DOUT 0 pin receives data from
0
Outgoing Multiplex 0 (Default value)
1
Outgoing Multiplex 1
STLC5460
0
DO0
WORKING REGISTER DESCRIPTION
Command Register (CMR)
R/W
7
0
R/W
CM
CR5
CR4
CR3
CR2
CR1
CR0
After Reset 00 (H)
Read/Write
R/W = 0. Write memory.
Address bits are provided by the Destination Register (DST)
Data bits are provided by the Source Register (SRC)
CM
CR 5/0
R/W = 1. Read Memory.
Address bits are provided by the Destination Register (DST)
Data bits will be in Source Register (SRC) when BUSY (Status Register) will go to ”0”.
Command memory.
CM = 1 Access to Command Memory
CM = 0 Access to Auxiliary Memory.
The meaning of these bits depends on the value of CM and R/W. The description is
given thereafter.
CM = 1
Command Memory
CM = 0
Auxiliary Memory
Command Register Bit 5 to 0 Subchannel configuration
Command if Write Memory
Status if Read Memory
Source Register
1 of 192 Input Time Slots or 1 of Byte if MON channel or Primitive
2 Insertion Registers
if C/I channel.
Destination Register
1 of 192 Output Time Slots or 1 1 of 16 MON channels
of 2 Extraction Registers
or 1 of 16 C/I channels
Following you will find a detailed explanation case by case of the meaning of all the bits of this register.
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