DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

DHQ1ECCSECETS1SR1WH

Intel® Quark SoC X1000

Intel 

Intel® Quark SoC X1000—Electrical Characteristics

Table 33. PCI Express* 2.0 Interface Timings (Sheet 2 of 2)

TTX-RISE/Fall

D+/D- TX Out put Rise/Fall time

0.125

UI

1,2,6

TRX-EYE

Minimum Receiver Eye Width

0.40

—

UI

5

3,4,6

Notes:

1.

Specified at the measurement point into a timing and voltage compliance test load and measured over any 250

consecutive TX UIs. (Also refer to the Transmitter compliance eye diagram)

2.

ATraTnTXs-mEYitEte=r

0.70 UI provides for a total sum of deterministic

collected over any 250 consecutive TX UIs. The

TaTnXdEYrEa-nMdEoDmIANj-ittot-eMrAbXu-JdITgTeEtR osfpTeTcXifJiIcTaTEtiRo-nMAeXn=su0re.3s 0a

UI for

jitter

the

distribution in which the median and the maximum deviation from the median is less than half of the total TX jitter

budget collected over any 250 consecutive TX UIs. It should be noted that the median is not the same as the mean. The

jitter median describes the point in time where the number of jitter points on either side is approximately equal as

opposed to the averaged time value.

3.

Specified at the measurement point and measured over any 250 consecutive UIs. The test load documented in the PCI

Express* specification 2.0 should be used as the RX device when taking measurements (also refer to the Receiver

compliance eye diagram). If the clocks to the RX and TX are not derived from the same reference clock, the TX UI

recovered from 3500 consecutive UI must be used as a reference for the eye diagram.

4.

AintTeRrXc-oEnYEne=ct0c.o4l0leUctIepdroavniyde2s50focr oanstoetcaultsivuemUoIsf .0T.6h0e

UI deterministic and random jitter budget for the Transmitter

TRX-EYE-MEDIAN-to--MAX-JITTER specification ensures a jitter

and

distribution in which the median and the maximum deviation from the median is less than half of the total 0.6 UI jitter

budget collected over any 250 consecutive TX UIs. It should be noted that the median is not the same as the mean. The

jitter median describes the point in time where the number of jitter points on either side is approximately equal as

opposed to the averaged time value. If the clocks to the RX and TX are not derived from the same reference clock, the

TX UI recovered from 3500 consecutive UI must be used as the reference for the eye diagram.

5.

Nominal Unit Interval is 400 ps for 2.5 GT/s.

6.

Intel® Quark SoC X1000 supports PCI Gen 1 timing only: 2.5 GT/s

Figure 4. PCI Express Transmitter Eye

Intel® Quark SoC X1000

DS

74

October 2013

Document Number: 329676001US

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