DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

DHQ1ECCSECETS1SR1WH

Intel® Quark SoC X1000

Intel 

Intel® Quark SoC X1000—Electrical Characteristics

Figure 8. USB EOP Width

Tperiod

Differential

Data Lines

4.8

4.8.1

General Interface Timing

Legacy SPI Interface Timing

Data

Crossover

Level

EOP

Width

Table 36.

4.8.2

Legacy SPI Interface Timings (20 MHz)

Sym

Parameter

Min

Max

Units

Notes Fig

F

Serial Clock Frequency - 20M Hz Operation

—

20

MHz

TCH

LSPI_SCK high time

20

—

ns

9

TCL

LSPI_SCK low time

30

—

ns

9

TDSCR

Setup of LSPI_MISO with respect to

LPSI_SCK rising edge

11.7

—

ns

9

TCRDH

Hold time of LSPI_MISO with respect to

LPSI_SCK rising edge

-3.0

—

ns

9

TCFDV

LSPI_SCK falling edge to LSPI_MOSI valid

-1.9

2.5

ns

9

TCFSF

LSPI_SCK falling edge to LSPI_SS_B low

-1.6

2.4

ns

9

TCFSR

LSPI_SCK falling edge to LSPI_SS_B high

-1.7

2.3

ns

9

Note:

1.

2.

3.

All input signals have a slope of 1.0ns measured between 20%and 80% VCC values

All output signals are loaded with 20pF

Measurements are made at 50% VCC levels

SPI0/1 Interface Timing

Table 37.

SPI0/1 Interface Timings (25 MHz)

Sym

F

TCH

TCL

TDSCR

TCRDH

TCFDV

Parameter

Serial Clock Frequency - 25MHz Operation

SPI0/1_SCK high time

SPI0/1_SCK low time

Setup of SPI0/1_MISO with respect to SPI0/

1_SCK capturing edge

Hold time of SPI0/1_MISO with respect to

SPI0/1_SCK capturing edge

SPI0/1_SCK driving edge to SPI0/1_MOSI

valid

Min

—

20

20

10.7

-2.5

-0.8

Max

Units Notes

Fig

25

MHz

—

ns

9

—

ns

9

—

ns

9

—

ns

9

3.5

ns

9

Intel® Quark SoC X1000

DS

78

October 2013

Document Number: 329676001US

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