ST7PLITEU09M3TR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7PLITEU09M3TR Datasheet PDF : 115 Pages
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ST7LITEU05 ST7LITEU09
13.4.2 Internal RC oscillator supply characteristics
Symbol
Parameter
Supply current in RUN mode 1)
Supply current in WAIT mode 2)
IDD Supply current in SLOW mode 3)
Supply current in SLOW-WAIT
mode 4)
Supply current in ACTIVE HALT
mode
Supply current in RUN mode 1)
Supply current in WAIT mode 2)
IDD Supply current in SLOW mode 3)
Supply current in SLOW-WAIT
mode 4)
Supply current in ACTIVE HALT
mode
Conditions
TA=25°C, int RC = 4 MHz
TA=25°C, int RC = 8 MHz
TA=25°C, AWU RC
TA=25°C, int RC = 4 MHz
TA=25°C, int RC = 8 MHz
TA=25°C, int RC/32 = 250 kHz
TA=25°C, int RC/32 = 250 kHz
TA=25°C, int RC = 4 MHz
TA=25°C, int RC = 2 MHz
TA=25°C, AWU RC
TA=25°C, int RC = 4 MHz
TA=25°C, int RC = 2 MHz
TA=25°C, int RC/32 = 250 kHz
TA=25°C, int RC/32 = 250 kHz
Min Typ Max 5) Unit
3.2
5.5
5.7
8.5
0.13 0.2
1.5
3.0
1.9
4.5
mA
1.3
2.0
1.1
1.8
0.8 1.25
2.0
3.0
1.3
2.0
0.1 0.18
1.0
1.6
0.9
1.5
mA
0.95 1.5
0.85 1.4
0.8
1.3
Notes:
1. CPU running with memory access, all I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals
in reset state; CPU clock provided by the internal RC, LVD disabled.
2. All I/O pins in input mode with a static value at VDD or VSS (no load), all peripherals in reset state; CPU clock provided
by the internal RC, LVD disabled.
3. SLOW mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at VDD or
VSS (no load), all peripherals in reset state; CPU clock provided by the internal RC, LVD disabled.
4. SLOW-WAIT mode selected with fCPU based on fOSC divided by 32. All I/O pins in input mode with a static value at
VDD or VSS (no load), all peripherals in reset state; CPU clock provided by the internal RC, LVD disabled.
5. Data based on characterization results, not tested in production.
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