ST72334J4TC View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST72334J4TC
STMicroelectronics
ST72334J4TC Datasheet PDF : 150 Pages
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ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto
I/O PORTS (Cont’d)
11.5.1 Register Description
DATA REGISTER (DR)
Port x Data Register
PxDR with x = A, B, C, D, E or F.
Read / Write
Reset Value: 0000 0000 (00h)
7
0
D7 D6 D5 D4 D3 D2 D1 D0
OPTION REGISTER (OR)
Port x Option Register
PxOR with x = A, B, C, D, E or F.
Read / Write
Reset Value: 0000 0000 (00h)
7
0
O7 O6 O5 O4 O3 O2 O1 O0
Bit 7:0 = D[7:0] Data register 8 bits.
The DR register has a specific behavior according
to the selected input/output configuration. Writing
the DR register is always taken into account even
if the pin is configured as an input; this allows to al-
ways have the expected level on the pin when tog-
gling to output mode. Reading the DR register re-
turns either the DR register latch content (pin con-
figured as output) or the digital value applied to the
I/O pin (pin configured as input).
DATA DIRECTION REGISTER (DDR)
Port x Data Direction Register
PxDDR with x = A, B, C, D, E or F.
Read / Write
Reset Value: 0000 0000 (00h)
Bit 7:0 = O[7:0] Option register 8 bits.
For specific I/O pins, this register is not implement-
ed. In this case the DDR register is enough to se-
lect the I/O pin configuration.
The OR register allows to distinguish: in input
mode if the pull-up with interrupt capability or the
basic pull-up configuration is selected, in output
mode if the push-pull or open drain configuration is
selected.
Each bit is set and cleared by software.
Input mode:
0: floating input
1: pull-up input with or without interrupt
Output mode:
0: output open drain (with P-Buffer deactivated)
1: output push-pull
7
0
DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0
Bit 7:0 = DD[7:0] Data direction register 8 bits.
The DDR register gives the input/output direction
configuration of the pins. Each bits is set and
cleared by software.
0: Input mode
1: Output mode
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