STM8S005K6T6CTR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM8S005K6T6CTR

Value line, 16 MHz STM8S 8-bit MCU, 32 Kbytes Flash, data EEPROM,10-bit ADC, timers, UART, SPI, I²C

STMicroelectronics 

STM8S005K6 STM8S005C6

Electrical characteristics

The reset network shown in the following figure protects the device against parasitic resets.

The user must ensure that the level on the NRST pin can go below VIL(NRST) max. (see Table

40: NRST pin characteristics ), otherwise the reset is not taken into account internally.

For power consumption sensitive applications, the external reset capacitor value can be

reduced to limit the charge/discharge current. If NRST signal is used to reset external circuitry,

attention must be taken to the charge/discharge time of the external capacitor to fulfill the

external devices reset timing conditions. Minimum recommended capacity is 100 nF.

Figure 37: Recommended reset pin protection

External

reset

circuit

(optional)

VDD

0.1 μF

NRST

RPU

STM8

Filter

Internal reset

9.3.9

SPI serial peripheral interface

Unless otherwise specified, the parameters given in the following table are derived from tests

performed under ambient temperature, fMASTER frequency and VDD supply voltage conditions.

tMASTER = 1/fMASTER.

Refer to I/O port characteristics for more details on the input/output alternate function

characteristics (NSS, SCK, MOSI, MISO).

Table 41: SPI characteristics

Symbol

Parameter

Conditions

Min

Max Unit

fSCK1

tc(SCK)

SPI clock

frequency

Master mode

Slave mode

0

8

MHz

0

6

tr(SCK)

tf(SCK)

SPI clock rise Capacitive load: C = 30 pF

and fall time

25

ns

tsu(NSS) (1)

NSS setup time Slave mode

4x

tMASTER

ns

th(NSS) (1)

NSS hold time Slave mode

70

ns

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