Electrical characteristics
STM8S005K6 STM8S005C6
Symbol
tw(SCKH) (1)
tw(SCKL) (1)
tsu(MI) (1)
tsu(SI) (1)
Parameter
Conditions
SCK high and Master mode
low time
Data input
setup time
Data input
setup time
Master mode
Slave mode
th(MI) (1)
th(SI) (1)
Data input hold Master mode
time
Data input hold Slave mode
time
ta(SO) (1) (2)
Data output
access time
Slave mode
tdis(SO) (1) (3)
Data output
disable time
Slave mode
tv(SO) (1)
Data output
valid time
Slave mode
(after enable edge)
tv(MO) (1)
Data output
valid time
Master mode
(after enable edge)
th(SO) (1)
Data output
hold time
Slave mode
(after enable edge)
th(MO) (1)
Master mode
(after enable edge)
Min
Max Unit
tSCK/2 -
15
tSCK/2 +
15
ns
5
ns
5
ns
7
ns
10
ns
3x
tMASTER
ns
25
ns
73
ns
36
ns
28
ns
12
ns
(1) Values based on design simulation and/or characterization results, and not tested in
production.
(2) Min time is for the minimum time to drive the output and the max time is for the maximum
time to validate the data.
(3) Min time is for the minimum time to invalidate the output and the max time is for the
maximum time to put the data in Hi-Z.
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DocID022186 Rev 3