Electrical characteristics
STM8S005K6 STM8S005C6
Figure 40: SPI timing diagram - master mode(1)
High
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tc(SCK)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
MISO
INP UT
tsu(MI)
MOSI
OUTU T
tw(SCKH)
tw(SCKL)
MS BIN
th(MI)
M SB OUT
tv(MO)
BI T6 IN
B I T1 OUT
th(MO)
tr(SCK)
tf(SCK)
LSB IN
LSB OUT
ai14136b
1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD.
9.3.10 I2C interface characteristics
Symbol Parameter
Table 42: I2C characteristics
Standard mode I2C Fast mode I2C(1) Unit
Min(2)
Max(2) Min(2)
Max(2)
tw(SCLL) SCL clock low time
4.7
1.3
μs
tw(SCLH) SCL clock high time
4.0
0.6
μs
tsu(SDA) SDA setup time
250
th(SDA) SDA data hold time
0(3)
100
ns
0(4)
900(3) ns
tr(SDA)
tr(SCL)
SDA and SCL rise time
1000
300 ns
tf(SDA)
tf(SCL)
SDA and SCL fall time
300
300 ns
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