T2080NXE8MQLB View Datasheet(PDF) - NXP Semiconductors.
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T2080NXE8MQLB Datasheet PDF : 186 Pages
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Electrical characteristics
Table 98. Gen 2i/2m 3G receiver AC specifications2 (continued)
Parameter
Symbol
Min
Deterministic jitter, fC3dB = fBAUD ÷ 1667 USATA_RXDJfB/1667 -
Notes:
1. Measured at receiver
2. For recommended operating conditions, see Table 3.
Typical
Max
-
0.35
Units Notes
UI p-p 1
3.19.9 SGMII interface
Each SGMII port features a 4-wire AC-coupled serial link from the SerDes interface of
the chip, as shown in Figure 46, where CTX is the external (on board) AC-coupled
capacitor. Each SerDes transmitter differential pair features 100-Ω output impedance.
Each input of the SerDes receiver differential pair features 50-Ω on-die termination to
XGNDn. The reference circuit of the SerDes transmitter and receiver is shown in Figure
39 .
3.19.9.1 SGMII clocking requirements for SDn_REF_CLKn_P and
SDn_REF_CLKn_N
When operating in SGMII mode, the ECn_GTX_CLK125 clock is not required for this
port. Instead, a SerDes reference clock is required on SD1_REF_CLK[1:2]_P and
SD1_REF_CLK[1:2]_Npins. SerDes 1 may be used for SerDes SGMII configurations
based on the RCW Configuration field SRDS_PRTCL.
For more information on these specifications, see SerDes reference clocks.
3.19.9.2 SGMII DC electrical characteristics
This section discusses the electrical characteristics for the SGMII interface.
3.19.9.2.1 SGMII and SGMII 2.5x transmit DC specifications
This table describes the SGMII SerDes transmitter AC-coupled DC electrical
characteristics. Transmitter DC characteristics are measured at the transmitter outputs
( SDn_TXn_P and SDn_TXn_N)as shown in Figure 47.
Table 99. SGMII DC transmitter electrical characteristics (XVDD = 1.35 V)4
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Output high voltage
VOH
-
-
1.5 x │VOD│-max mV 1
Table continues on the next page...
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
134
NXP Semiconductors
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