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T2080NXE8MQLB View Datasheet(PDF) - NXP Semiconductors.

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T2080NXE8MQLB Datasheet PDF : 186 Pages
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Electrical characteristics
Table 101. SGMII DC receiver electrical characteristics (SVDD = 1.0V)4 (continued)
Parameter
Symbol
Min
Typ
Max
Unit Notes
Receiver differential input impedance
Notes:
ZRX_DIFF
80
-
120
Ω
-
1. Input must be externally AC coupled.
2. VRX_DIFFp-p is also referred to as peak-to-peak input differential voltage.
3. The concept of this parameter is equivalent to the electrical idle detect threshold parameter in PCI Express. See PCI
Express DC physical layer receiver specifications, and PCI Express AC physical layer receiver specifications, for further
explanation.
4. For recommended operating conditions, see Table 3.
This table defines the SGMII 2.5x receiver DC electrical characteristics for 3.125 GBaud.
Table 102. SGMII 2.5x receiver DC timing specifications (SVDD = 1.0V)1
Parameter
Symbol
Min
Input differential voltage
Loss of signal threshold
Receiver differential input impedance
Notes:
VRX_DIFFp-p
VLOS
ZRX_DIFF
200
75
80
1. For recommended operating conditions, see Table 3.
Typical
-
-
-
Max
1200
200
120
Unit
mV
mV
Ω
Notes
-
-
-
3.19.9.3 SGMII AC timing specifications
This section discusses the AC timing specifications for the SGMII interface.
3.19.9.3.1 SGMII and SGMII 2.5x transmit AC timing specifications
This table provides the SGMII and SGMII 2.5x transmit AC timing specifications. A
source synchronous clock is not supported. The AC timing specifications do not include
RefClk jitter.
Table 103. SGMII transmit AC timing specifications4
Parameter
Symbol
Min
Typ
Deterministic jitter
JD
Total jitter
JT
Unit Interval: 1.25 GBaud (SGMII)
UI
800 - 100 ppm 800
Unit Interval: 3.125 GBaud (2.5x SGMII]) UI
320 - 100 ppm 320
AC coupling capacitor
Notes:
CTX
10
1. Each UI is 800 ps ± 100 ppm or 320 ps ± 100 ppm.
Max
Unit
0.17
UI p-p
0.35
UI p-p
800 + 100 ppm ps
320 + 100 ppm ps
200
nF
Notes
2
1
1
3
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
138
NXP Semiconductors

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