ST72361xx-Auto
Electrical characteristics
1. Data based on characterization results, not tested in production.
2. When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS.
Figure 119. RAIN max vs fADC with CAIN = 0pF
45
40
35
30
25
20
15
10
5
0
0
10
30
CPARASITIC (pF)
4 MHz
2 MHz
1 MHz
70
1. CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus
the pad capacitance (3pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this,
fADC should be reduced.
2. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than
10k). Data based on characterization results, not tested in production.
Figure 120. Recommended CAIN/RAIN values
1000
Cain 10 nF
100
Cain 22 nF
Cain 47 nF
10
1
0.1
0.01
0.1
1
10
fAIN(KHz)
1. Figure 143 shows that depending on the input signal variation (fAIN), CAIN can be increased for stabilization
time and reduced to allow the use of a larger serial resistor (RAIN). It is valid for all fADC frequencies
4 MHz.
Figure 121. Typical application with ADC
VAIN
RAIN
AINx
CAIN
VDD
VT
0.6V
VT
0.6V
ST72XXX
2kmax
10-Bit A/D
Conversion
IL
±1µA
CADC
6pF
Doc ID 12468 Rev 3
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