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STM32WB55CEV7 View Datasheet(PDF) - STMicroelectronics

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STM32WB55CEV7 Datasheet PDF : 193 Pages
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STM32WB55xx STM32WB35xx
Electrical characteristics
The SDA and SCL I/O requirements are met with the following restriction: the SDA and SCL
I/O pins are not “true” open-drain. When configured as open-drain, the PMOS connected
between the I/O pin and VDD is disabled, but is still present. The 20 mA output drive
requirement in Fast-mode Plus is supported partially.
This limits the maximum load Cload supported in Fast-mode Plus, given by these formulas:
tr(SDA/SCL) = 0.8473 x Rp x Cload
Rp(min) = [VDD - VOL(max)] / IOL(max)
where Rp is the I2C lines pull-up. Refer to Section 6.3.17 for the I2C I/Os characteristics.
All I2C SDA and SCL I/Os embed an analog filter, refer to Table 92 for its characteristics.
Table 92. I2C analog filter characteristics(1)
Symbol
Parameter
Min
Max
tAF
Maximum pulse width of spikes that
are suppressed by the analog filter
50(2)
110(3)
1. Guaranteed by design.
2. Spikes with widths below tAF(min) are filtered.
3. Spikes with widths above tAF(max) are not filtered
Unit
ns
SPI characteristics
Unless otherwise specified, the parameters given in Table 93 for SPI are derived from tests
performed under the ambient temperature, fPCLKx frequency and supply voltage conditions
summarized in Table 24: General operating conditions.
Output speed is set to OSPEEDRy[1:0] = 11
Capacitive load C = 30 pF
Measurement points are done at CMOS levels: 0.5 VDD
Refer to Section 6.3.17 for more details on the input/output alternate function characteristics
(NSS, SCK, MOSI, MISO for SPI).
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