STPC® ATLAS
Table 4-11. SDRAM Bus AC Timings - Industrial Temperature Range
Name Parameter
Min Typ Max Unit
Tcycle MCLKI Cycle Time
11
ns
Thigh MCLKI High Time
4
ns
Tlow MCLKI Low Time
4
ns
MCLKI Rising Time
1
ns
MCLKI Falling Time
1
ns
Tdelay MCLKx to MCLKI delay
0.5
1
1.5
ns
MCLKI to RAS# Valid
1.7
6.5
ns
MCLKI to CAS# Valid
1.7
6.5
ns
MCLKI to CS# Valid
1.7
6
ns
Toutput MCLKI to DQM[ ] Outputs Valid
2
6
ns
MCLKI to MD[ ] Outputs Valid
2
7.8
ns
MCLKI to MA[ ] Outputs Valid
1.7
MCLKI to MWE# Valid
1.7
t(s) Tsetup MD[63:0] setup to MCKLI
4.7
Thold MD[63:0] hold from MCKLI
-0.36
c Note: These timings are for a load of 50pF, part running at 90MHz and ReadCLK not activated
Obsolete Product(s) - Obsolete Produ The PC100 memory is recommended to reach 90MHz operation.
6.5
ns
6
ns
ns
2.3
ns
52/108
1