C8051F002 查看數據表（PDF） - Silicon Laboratories

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C8051F002

Mixed-Signal 32KB ISP FLASH MCU Family

Silicon Laboratories 

C8051F000/1/2/5/6/7

C8051F010/1/2/5/6/7

19.2. Timer 2

Timer 2 is a 16-bit counter/timer formed by the two 8-bit SFRs: TL2 (low byte) and TH2 (high byte). As with

Timers 0 and 1, Timer 2 can use either the system clock or transitions on an external input pin as its clock source.

The Counter/Timer Select bit C/T2 bit (T2CON.1) selects the clock source for Timer 2. Clearing C/T2 selects the

system clock as the input for the timer (divided by either one or twelve as specified by the Timer Clock Select bit

T2M in CKCON). When C/T2 is set to 1, high-to-low transitions at the T2 input pin increment the counter/timer

register. (Refer to Section 14 for information on selecting and configuring external I/O pins.) Timer 2 can also be

used to start an ADC Data Conversion.

Timer 2 offers capabilities not found in Timer 0 and Timer 1. It operates in one of three modes: 16-bit

Counter/Timer with Capture, 16-bit Counter/Timer with Auto-Reload or Baud Rate Generator Mode. Timer 2’s

operating mode is selected by setting configuration bits in the Timer 2 Control (T2CON) register. Below is a

summary of the Timer 2 operating modes and the T2CON bits used to configure the counter/timer. Detailed

descriptions of each mode follow.

RCLK TCLK CP/RL2 TR2 Mode

0

0

1

1

16-bit Counter/Timer with Capture

0

0

0

1

16-bit Counter/Timer with Auto-Reload

0

1

X

1

Baud Rate Generator for TX

1

0

X

1

Baud Rate Generator for RX

1

1

X

1

Baud Rate Generator for TX and RX

X

X

X

0

Off

Rev. 1.7

146

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