C8051F002 查看數據表（PDF） - Silicon Laboratories

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C8051F002

Mixed-Signal 32KB ISP FLASH MCU Family

Silicon Laboratories 

C8051F000/1/2/5/6/7

C8051F010/1/2/5/6/7

19.2.2. Mode 1: 16-bit Counter/Timer with Auto-Reload

The Counter/Timer with Auto-Reload mode sets the TF2 timer overflow flag when the counter/timer register

overflows from 0xFFFF to 0x0000. An interrupt is generated if enabled. On overflow, the 16-bit value held in the

two capture registers (RCAP2H, RCAP2L) is automatically loaded into the counter/timer register and the timer is

restarted.

Counter/Timer with Auto-Reload mode is selected by clearing the CP/RL2 bit. Setting TR2 to logic 1 enables and

starts the timer. Timer 2 can use either the system clock or transitions on an external input pin as its clock source, as

specified by the C/T2 bit. If EXEN2 is set to logic 1, a high-to-low transition on T2EX will also cause Timer 2 to

be reloaded. If EXEN2 is cleared, transitions on T2EX will be ignored.

SYSCLK

T2

T2EX

Figure 19.12. T2 Mode 1 Block Diagram

12

0

CKCON

TTT

210

MMM

1

0

Crossbar

1

TR2

EXEN2

Crossbar

TCLK

TL2

TH2

Reload

RCAP2L RCAP2H

CP/RL2

C/T2

TR2

EXEN2

TCLK

RCLK

EXF2

TF2

Interrupt

Rev. 1.7

148

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