C8051F045 查看數據表（PDF） - Silicon Laboratories

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C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

14. Oscillators

Option 3

XTAL1

XTAL2

Option 4

XTAL1

Option 2

VDD

XTAL1

Option 1

XTAL1

XTAL2

OSCICL

OSCICN

CLKSEL

EN

Programmable

Internal Clock

Generator

Input

Circuit

OSC

n

0

SYSCLK

1

OSCXCN

Figure 14.1. Oscillator Diagram

14.1. Programmable Internal Oscillator

All C8051F04x devices include a programmable internal oscillator that defaults as the system clock after a

system reset. The internal oscillator period can be programmed via the OSCICL register as defined by

SFR Definition 14.1. OSCICL is factory calibrated to obtain a 24.5 MHz frequency.

Electrical specifications for the precision internal oscillator are given in Table 14.1 on page 175. The pro-

grammed internal oscillator frequency must not exceed 25 MHz. The system clock may be derived from

the programmed internal oscillator divided by 1, 2, 4, or 8, as defined by the IFCN bits in register OSCICN.

Rev. 1.5

173

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