LTC3775
APPLICATIONS INFORMATION
After the calculations have been completed, it is impor-
tant to measure the gate drive waveforms and the gate
driver supply voltage (INTVCC to PGND) over all operating
conditions (low VIN, nominal VIN and high VIN, as well
as from light load to full load) to ensure adequate power
MOSFET enhancement. Consult the power MOSFET data
sheet to determine the actual RDS(ON) for the measured
VGS, and verify your thermal calculations by measuring
the component temperatures using an infrared camera
or thermal probe.
Operation at High Supply Voltage
At high input voltages, the LTC3775’s internal LDO can
dissipate a significant amount of power, which could
cause the maximum junction temperature to be exceeded.
Conditions such as a high operating frequency, or the use
of more than one power MOSFET in parallel, could push
the junction temperature rise to high levels. To prevent
the maximum junction temperature from being exceeded,
the input supply current must be checked while operating
in continuous conduction mode at maximum VIN. See
the Thermal Considerations section for calculation of the
maximum junction temperature.
TG
10V/DIV
VSW
10V/DIV
VIN = 28V
VOUT = 0.6V
LOAD = 1A
20ns/DIV
MODE/SYNC = 0V
SW FREQ = 1MHz
3775 F11
Figure 11. Minimum On-Time Waveforms
in Forced Continuous Mode
TG
10V/DIV
VSW
10V/DIV
Low Duty Cycle Operation
The LTC3775 uses a leading edge modulation architec-
ture. Because the top MOSFET turns on when the PWM
comparator trips, the top MOSFET minimum on-time
is not dependent on the propagation delay of the PWM
comparator; it is only limited by the internal delays of the
gate drivers and the rise/fall time of the power MOSFET
gate. This allows the LTC3775 to operate in very low duty
cycle applications with a large step-down ratio. Figure 11
shows minimum on-time waveforms for forced continuous
mode operation.
If pulse-skipping mode is selected, the LTC3775 allows
the controller to skip pulses at light load, thereby reducing
switching losses and improving the efficiency. Figure 12
shows waveforms of the minimum on-time in pulse-skip-
ping mode.
If the TG on-time is less than the blanking time of the topside
current limit comparator, CTLIM, the topside comparator
never trips during normal operation. The blanking time
18
VIN = 28V
VOUT = 0.6V
LOAD = 1A
20ns/DIV
MODE/SYNC = INTVCC
SW FREQ = 1MHz
3775 F12
Figure 12. Minimum On-Time Waveforms
in Pulse-Skipping Mode
is 200ns for RDS(ON) sensing and 100ns when a sense
resistor is used. For TG on-times smaller than the topside
blanking times, the LTC3775 relies on the bottom current
limit comparator, CBLIM, to monitor the inductor current.
If CBLIM trips, the LTC3775 starts to skip pulses and at
the same time pulls down the soft-start capacitor to limit
the duty cycle. If VOUT drops sufficiently, the TG on-time
can increase enough to turn on CTLIM and limit the peak
inductor current. The minimum on-time of the application
circuit can be calculated at maximum VIN:
tON(MIN)
=
fSW
VOUT
• VIN(MAX)
3775fa