ST6246 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

生产厂家

ST6246

8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER

STMicroelectronics 

ST62T46B/E46B

TIMER 1& 2 (Cont’d)

4.2.4 TIMER 1 Registers

Timer Status Control Register (TSCR)

Address: 0D4h — Read/Write

7

0

TMZ ETI

-

-

PSI PS2 PS1 PS0

Bit 7 = TMZ: Timer Zero bit

A low-to-high transition indicates that the timer

count register has decrement to zero. This bit

must be cleared by user software before starting a

new count.

Bit 6 = ETI: Enable Timer Interrup

When set, enables the timer interrupt request. If

ETI=0 the timer interrupt is disabled. If ETI=1 and

TMZ=1 an interrupt request is generated.

Bit 5 = Reserved. Must be set to 1.

Bit 4 = Do not care

Data sent to the timer output when TMZ is set high

(output mode only). Input mode selection (input

mode only)

Bit 3 = PSI: Prescaler Initialize Bit

Used to initialize the prescaler and inhibit its count-

ing. When PSI=“0” the prescaler is set to 7Fh and

the counter is inhibited. When PSI=“1” the prescal-

er is enabled to count downwards. As long as

PSI=“0” both counter and prescaler are not run-

ning.

Bit 2, 1, 0 = PS2, PS1, PS0: Prescaler Mux. Se-

lect. These bits select the division ratio of the pres-

caler register.

Table 13. Prescaler Division Factors

PS2

PS1

PS0 Divided by

0

0

0

1

0

0

1

2

0

1

0

4

0

1

1

8

1

0

0

16

1

0

1

32

1

1

0

64

1

1

1

128

Timer Counter Register (TCR)

Address: 0D3h — Read/Write

7

0

D7 D6 D5 D4 D3 D2 D1 D0

Bit 7-0 = D7-D0: Counter Bits.

Prescaler Register PSC

Address: 0D2h — Read/Write

7

0

D7 D6 D5 D4 D3 D2 D1 D0

Bit 7 = D7: Always read as ”0”.

Bit 6-0 = D6-D0: Prescaler Bits.

42/72

378

Share Link: