ST6246 查看數據表（PDF） - STMicroelectronics

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ST6246

8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER

STMicroelectronics 

ST62T46B/E46B

4.5 LCD CONTROLLER-DRIVER

On-chip LCD driver includes all features required

for LCD driving, including multiplexing of the com-

mon plates. Multiplexing allows to increase display

capability without increasing the number of seg-

ment outputs. In that case, the display capability is

equal to the product of the number of common

plates with the number of segment outputs.

A dedicated LCD RAM is used to store the pattern

to be displayed while control logic generates ac-

cordingly all the waveforms sent onto the segment

or common outputs. Segments voltage supply is

MCU supply independant, and included driving

stages allow direct connection to the LCD panel.

The multiplexing ratio (Number of common plates)

and the base LCD frame frequency is software

configurable to achieve the best trade-off con-

trast/display capability for each display panel.

The 32KHz clock used for the LCD controller is

derivated from the MCU’s internal clock and there-

fore does not require a dedicated oscillator. The

division factor is set by the three bits HF0..HF2 of

the LCD Mode Control Register LCDCR as sum-

marized in Table 15 for recommanded oscillator

Figure 25. LCD Block Diagram

quartz values. In case of oscillator failure, all seg-

ment and common lines are switched to ground to

avoid any DC biasing of the LCD elements.

Table 15. Oscillator Selection Bits

MCU

Oscillator HF2 HF1 HF0

Division Factor

fOSC

0 0 0 Clock disabled: Display off

1.048MHz 0 1 1 32

2.097MHz 1 0 0 64

4.194MHz 1 0 1 128

8.388MHz 1 1 0 256

Notes:

1. The usage fOSC values different from those

defined in this table cause the LCD to operate at a

reference frequency different from 32.768KHz, ac-

cording to division factor of Table 15.

2. It is not recommended to select an internal

frequency lower than 32.768KHz as the clock su-

pervisor circuit may switch off the LCD peripheral

if lower frequency is detected.

1/3 2/3

VLCD VLCD VLCD

BACKPLAN ES

SEGME NTS

VOLTAGE

DIVIDE R

COMMON

DRIVE R

SEG MENT

DRIVER

fint

OSC 32KHz

(When available)

CONTROLLER

32KHz

CLOCK

SELECTION

CONTROL

REGISTER

DATA BUS

LCD

RAM

VR02099

48/72

384

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